1. Field of the Invention
The present invention relates to liquid crystal display (LCD) apparatuses, allowing data supplied to a liquid crystal pixel driver of a liquid crystal panel to be transmitted in series and a method of controlling the same.
2. Description of the Related Art
Generally, an LCD apparatus for a computer includes an analog/digital (AD) converter, a scaler, a timing controller and a liquid crystal panel. The AD converter converts red, green, and blue (RGB) image signals received from a video card installed on a computer motherboard into digital signals. The scaler adjusts the RGB image signals digitalized by the AD converter adaptively to a size of the liquid crystal panel. The timing controller converts video data based on the RGB image signals and horizontal and vertical (H/V) sync signals into timing signals to display the converted view signals on the panel and outputs the timing signals. The liquid crystal panel is driven according to the video data, a clock signal, and a control signal transmitted from the timing controller.
The liquid crystal panel is equipped with an array board forming thereon a matrix array. The matrix array includes a plurality of pixel electrodes and a liquid crystal pixel driver provided in the array board to supply pixel data signals to signal lines of the pixel electrodes. The liquid crystal pixel driver drives liquid crystal pixels by voltage control, which includes a gate driver driving pixels in a vertical line of the liquid crystal panel and a source driver driving pixels in a horizontal line.
Here, the gate driver includes a plurality of driver ICs 53 horizontally arrayed as shown in FIG. 5. On each driver IC 53 a plurality of registers are formed storing therein the video data to be displayed on the liquid crystal panel 51, a power source line (VDD), a ground line (GND), a data line (DATA), and a control signal line (CNT). The converted video signals and the control signal transmitted from the timing controller 55 are transmitted to each gate driver IC through a plurality of signal input lines 57 in a parallel manner.
To connect the timing controller 55 and the plurality of the driver ICs 53 in parallel, a multiplicity of connection lines are required. For example, in a case where eight 8-bit driver ICs are used to allow a screen of extended graphics array (XGA) (1024×768) to be displayed, 8×(8×3×2+9+8+2)=536 connection lines are required. A number of connection lines is calculated using a number of driver ICs×(the number of 8-bit×R, G, B×data transmission lines+horizontal/vertical sync signal line+enable line+power source line+ground line).
As described above, connecting the signal lines to each of the driver ICs 53 becomes difficult if the timing controller 55 is connected to the plurality of the driver ICs 53 in parallel. A horizontal enlargement of a screen requires the addition of driver ICs, and thus, the number of connection lines increases, which becomes inconvenient.